José Epifânio da Franca

José Epifânio da Franca

testes

1979

Began a part-time research studentship funded by INIC (Instituto Nacional de Investigação Científica), focused on the design of high-quality RC-active filters for implementation using hybrid integrated circuit technology.

1980-1982

Conducted extensive research on high-quality RC-active filters. Notable contributions include a preliminary filter design for the 28–32 kHz channel in FDM transmission systems then under development at CET-Aveiro (Centro de Estudos de Telecomunicações), as well as a research project submitted for the Scientific Capacity Examination at Instituto Superior Técnico (IST)

August 1980

Completed a research internship at the Department of Electrical Engineering, Imperial College London. Designed a preliminary switched-capacitor filter for PCM transmission systems.

August–November 1982

Engaged in a short research project for the Admiralty Underwater Weapons Establishment, focusing on monolithic integrated filters in bipolar technology.

1983–1985

From January 1983 to June 1985, joined Imperial College London as a Ph.D. Research Student, integrating into a research group specializing in microelectronic filters. Funded by a British Telecom scholarship. For his outstanding academic performance and research contributions, he was awarded the prestigious ORS (Overseas Research Student) Award in both 1983/84 and 1984/85.

July–September 1985

Served as a consultant to the British Telecom Research Laboratories. Conducted a feasibility study on implementing a 16-channel spectral analyzer in monolithic IC technology for speech recognition systems.

August–September 1986

Consultant to the Admiralty Research Establishment, through a research project based at the Department of Electrical Engineering, Imperial College. Investigated a new generation of decimation circuits using switched-capacitor techniques for PCM system interfaces.

Since 1986

In 1986, he independently founded what would become the Integrated Circuits and Systems Group at IST.

Between 1986 and 1987, he led a research contract focused on analog monolithic integrated circuits for high-speed telephone channel modems. This collaboration resulted in the first commercially viable switched-capacitor filter designed and fabricated in Portugal. Prototype testing demonstrated the high performance of the filters.
From 1987 to 1988, he was responsible for a second research contract involving an integrated interface system, which introduced several innovative techniques for analog-to-digital (A/D) and digital-to-analog (D/A) conversion and filtering. Some of the proposed solutions were adopted by IMP-Europe for the development of a commercial IC for British Telecom. This work led to two patent applications filed by British Telecom, one of which was granted in the United States.
The results were disseminated through multiple international and national conference presentations.

Between 1989 and 1991, he led a research project to develop a 16-bit CMOS successive approximation A/D converter with conversion rates up to 60 kHz, employing novel self- calibration techniques.
Following the success of this development, AMS signed a commercial agreement with Burr- Brown (USA) for the supply of high-resolution successive approximation A/D converters based on this technology.
From 1994 to 1995, he led a second AMS project focused on the development of an algorithmic CMOS A/D converter.

Between 1993 and 1995, he led a project on current-mode D/A converters for mobile phones, addressing strict constraints on silicon area and power dissipation — critical for optimizing production cost (via area and yield) and operational efficiency (via power consumption).

From 1994 to 1995, he led an additional project on nano-power circuits based on switch- controlled charge transfer techniques, which resulted in an international patent.

Since December 1993, he has coordinated a research project on high-frequency A/D converters for digital transmission technologies, funded by the International Telecommunication Union (ITU).

Between 1994 and 1996, he directed the Associate Design Centre agreement between ES2 and IST, enabling collaborative IC design projects within the scientific and technological expertise of the Integrated Circuits and Systems Group. This collaboration also resulted in an international patent.

From 1994 to 1996, he was the recipient of a Research Grant from Rockwell Semiconductors, supporting research and advanced training in analog–digital integrated circuits. The grant followed Rockwell’s recruitment of two students from his research group, who joined its development center in Newport Beach, California.

Between 1997 and 1999, he led a project to design a 14-bit high-resolution A/D converter in 0.6 μm CMOS technology.

Recipient of a teaching and scientific exchange grant in the field of microelectronics, enabling academic visits to the University of Edinburgh, Katholieke Universiteit Leuven (Heverlee), and the Technical University of Denmark (Lyngby).

JAMIE (EU 579) | October 1992 – September 1993
Led the participation of Instituto Superior Técnico (IST) in this project focused on the development of integrated circuits and design methodologies for analog–digital ICs using full- custom and semi-custom approaches.

ADCICS (Esprit II 2193) | October 1990 – October 1993
Directed IST’s contributions to the development of monolithic analog–digital integrated circuits in CMOS technology.

AD2000 (Esprit II 5056) | January 1991 – January 1994
Served as Project Leader. The project addressed advanced architectures for CMOS A/D and D/A converters, as well as techniques for programmability and built-in self-testing.
The project was later selected by the VALUE Programme for a study on its commercial potential in the European market.

NEAR (Network for European Analogue Research) | September 1992 – December 1994 Founding member and Steering Committee participant in this University–Industry network for cooperation and exchange in analog–digital IC design.

MEDCHIP 1 (Esprit III WG 7307) | October 1992 – October 1993
Led this Basic Research Working Group studying university-level training capabilities in microelectronics across Portugal, Spain, Southern Italy, and Greece, and proposed modernization strategies tailored to industrial needs.

MEDCHIP 2 (Esprit Project 8030) | December 1994 – December 1996
As a continuation of MEDCHIP 1, also led this second phase aimed at strengthening and modernizing university-based microelectronics training infrastructures in the same Mediterranean countries.

AMFIS (Esprit III 8795) | October 1993 – October 1996
Directed IST’s participation and a dedicated Work Package in this project focused on multi- functional analog–digital integrated systems.
Partners included: Mietec Alcatel (BE), Landis & Gyr (CH), CSEM (CH), ABB Nera (NO), Sintef (NO), AMS (AT), Italtel (IT), EID (PT), University of Pavia (IT), CNM Seville (ES).

ALCD (Esprit III 8030) | November 1993 – November 1996
Led IST’s involvement in this project on analog component and functional block libraries for digital CMOS technologies.
Key partners: European Silicon Structures (FR), Bosch (DE), Intracom (GR), TU Athens (GR), University of Pavia (IT).

ASIC4PMR (Esprit 23989) | December 1996 – August 1998
Coordinated IST’s contributions to this project on analog–digital IC systems for Private Mobile Radio (PMR) terminals. IST was specifically responsible for the design of a baseband I/Q modem.
Consortium: Atmel (FR), Matra Nortel Cellular (FR), ARM (UK), OTE Marconi (IT).

POLICOM (Esprit 25481) | December 1997 – December 1999
Led IST’s participation in the development of a CMOS modem for data communication over low-voltage power lines (home grid). IST designed the I/Q baseband interface using S-FSK modulation techniques.
Partners: Atmel (FR), Sainco (ES), University of Seville – Grupo AICIA (ES), Santel (SE).

PAPRICA (Esprit 25476) | August 1997 – February 2000
In collaboration with Prof. Carlos Azeredo Leme, directed IST’s contributions to the development of a novel low-power RF front-end architecture for monolithic integration.
Responsibilities included behavioral macro-modeling and implementation of key blocks across the RF-to-baseband signal chain.
Partners: Atmel (FR), Matra Nortel Cellular (FR).

MIXMODEST (Esprit 29261) | September 1998 – March 2001
In collaboration with Prof. João Vital, led IST’s participation in the design of submicron analog– digital circuits. IST focused on self-calibrated high-resolution A/D converters for ADSL modems.
Partners: Alcatel Microelectronics (BE), KU Leuven (BE), Instituto de Microelectrónica – University of Seville (ES), University of Pavia (IT).

RAPID (Esprit 29648) | September 1998 – March 2001
Served as Project Coordinator for this initiative developing design methodologies and tools for analog–digital ASICs, supporting automatic retargetability across technologies and specifications. Consortium included: Chipidea Microelectrónica (PT) and the Institute of Microelectronics – University of Seville (ES).

UPIC (RTP 2.9) | January 1993 – January 1995
Directed IST’s participation and a dedicated Work Package in this project on (re)programmable analog–digital ICs for military applications.
Partners: Thomson-CSF (FR), Cetia (FR), INPG (FR), EID (PT).

FASTPLEX | December 1992 – December 1995
Led IST’s involvement in the development of an integrated signal processing system for particle trajectory detection in high-energy physics experiments.
Partners: CERN (CH), University of Brussels (BE), NIEF (NL).

WORKBENCH Project
Participated in the development of computer-assisted teaching modules and experimental techniques for electronics education.

Led a collaborative project between FOC-Escolar and the Department of Electrical and Computer Engineering at IST, focused on the development and industrialization of an educational electronics kit. The resulting product received the Worlddidac Bronze Award at DIDACTA 88, the world’s largest educational technology exhibition, and has been widely adopted by public schools in Portugal.

Directed the MODUL.COMP90 project, aimed at the development and industrialization of a modular experimental system with integrated auxiliary instrumentation for practical training in electronics, telecommunications, automation, control systems, and instrumentation.
The system currently includes over 40 experimental modules and 3 auxiliary instrumentation modules, with planned expansion to more than 70 experimental modules and 5 instrumentation modules. It is in use across various secondary and higher education institutions throughout Portugal.

Led the development of a CMOS integrated circuit for the audio processing unit in portable radio transceivers. The project was carried out in collaboration with the Portuguese Army’s General Depot for Signal Equipment.

Directed a project aimed at the automation of design, implementation, fabrication, and testing processes for high-quality analog hybrid circuits using thick-film technology. The initiative was conducted in collaboration with LNETI (Laboratório Nacional de Engenharia e Tecnologia Industrial).
Additionally, secured financial support for establishing core computing infrastructure for the Integrated Circuits and Microelectronics Systems Group at IST.

Led a project on intelligent architectures for analog-to-digital and digital-to-analog interfaces operating at high frequencies.

Directed this project on programmable filter and signal converter architectures for CMOS technology implementation.

Coordinated this research initiative on high-frequency analog–digital circuits for data acquisition interfaces in high-energy physics applications. The project was conducted in collaboration with the University of Aveiro.

To support the internationalization of the Integrated Circuits and Systems Group and to offer early-career researchers opportunities for internships in leading scientific and technological centers, a global academic collaboration network has been cultivated with top universities and research institutes across Europe and the United States. Key partnerships include:

Scientific and technological cooperation agreement with the Microelectronics Group, facilitating research internships and access to monolithic integrated circuit design infrastructure.

Joint research program for the development of integrated MOS systems for continuous-time and sampled analog signal processing, targeting very high-frequency filtering applications.

Collaboration with the Integrated Circuits Design Group to study and develop high-speed D/A converters based on quasi-passive, ultra-low-power architectures.

Research partnership focused on oversampled delta-sigma modulation circuits for high- resolution signal conversion.

Cooperation program in sensor system integration, including research on monolithic technologies and circuits for sensor interfacing.

Joint research activities in automated design of analog–digital circuits and systems, with emphasis on signal conversion architectures.

Collaboration on multi-rate analog and digital circuit and system design, particularly in the context of signal conversion and processing applications.

Cooperation in the area of multi-rate signal processing and the design of switched-capacitor systems in CMOS technology.

This international network has enabled numerous IST researchers to engage in short-and medium-term research exchanges, significantly contributing to the group’s scientific output and reinforcing its global visibility in microelectronics and signal processing.

International Lectures and Invited Seminars

  • Narrowband Bandpass Switched-Capacitor Filter Systems

    IEEE Evening Lecture, Imperial College London, UK

  • Applications of Decimation and Interpolation Techniques in SC Filter Systems
    Allen Clark Research Centre, Plessey (Caswell), UK

University of Hull, Department of Electronics Engineering, UK

  • Principles of Operation of Switched-Capacitor Filter Systems
  • Switched-Capacitor Techniques for Sampling Rate Conversion
  • On the Design of Parasitic-Insensitive Switched-Capacitor Biquadratic Sections
  • From Circuits to Systems – A View of the Role and Needs of Analogue Signal Processing Now and in the Future
    8th CAVE (CAD for VLSI in Europe) Workshop, Grassau, Germany

University of Pavia, Department of Electronics, Italy

  • Switched-Capacitor Processing of Bandpass Signals
  • Multirate Switched-Capacitor Circuits

Microelectronics Design Centre, Technical University of Denmark, Lyngby

  • Present Achievements and Future Prospects of Multirate SC Signal Processing
  • Design of Switched-Capacitor Filters by Signal Flow Graphs

High-Level Architecture Compilation of Charge Redistribution Data Converters
Portland State University, USA

  • Multirate Switched-Capacitor Signal Processing
    Oregon Center for Advanced Technology Education, USA
  • Novel Aspects and Applications of Sampled-Data Switched-Capacitor Circuits Center for Communications Research, Columbia University (NY), USA

Swiss Federal Institute of Technology (ETH Zurich), Switzerland

  • Analog Interfacing for Digital VLSI Systems

University of California, Santa Barbara, Department of Electrical and Computer Engineering, USA

  • Communications Applications of Multirate Switched-Capacitor Systems
  • Continuous-Time Filter Tuning
  • Multirate Switched-Capacitor Networks for High-Frequency Filtering
  • Analog Interfacing for Digital VLSI Systems

Oregon State University, Department of Electrical and Computer Engineering, USA

  • Analog Interfacing for Digital VLSI Systems
  • Multirate Switched-Capacitor Networks for High-Frequency Filtering
  • Recent Developments and Future Trends of Multirate A-D Signal Processing and Conversion

Portland State University, Department of Electrical Engineering, USA

  • Multirate Switched-Capacitor Networks for High-Frequency Filtering
  • Recent Developments and Future Trends of Multirate A-D Signal Processing and Conversion

Technical Research Center of Finland (Espoo, Helsinki)

  • High-Performance Integrated CMOS Data Converters – Overview of the Research Work at IST

Swiss Federal Institute of Technology (ETH Zurich), Institute for Information and Signal Processing

  • Low-Cost Field Programmable Switched-Capacitor and Switched-Current Filters
  • Continuous-Time Filter Tuning
  • Recent Developments and Future Trends of Multirate A-D Signal Processing and Conversion
  • Analog Interfacing for Digital VLSI Systems

Nokia Mobile Phones Research Center, Oulu, Finland

  • Narrow and Very Narrow Bandpass Integrated Filtering
  • Recent Developments and Future Trends of Multirate A-D Signal Processing and Conversion
  • Low-Cost Field Programmable Switched-Capacitor and Switched-Current Filters
  • Digital VLSI-Compatible Analog Design
    Siemens Research Centre, Munich, Germany
  • High-Performance Integrated CMOS Data Converters – Overview of the Research Work at IST
  • Recent Developments and Future Trends of Multirate A-D Signal Processing and Conversion Tsinghua University, People’s Republic of China
  • Self-Adjusted Analog Circuits
    Hong Kong University of Science and Technology, Hong Kong
  • Block-Driven CMOS Interface Design
    Invited Lecture, Design of Integrated Circuits and Systems Conference, Seville
  • A/D and D/A Converters
    Chinese University of Hong Kong
  • Self-Adjusted Analog Circuits
    Chinese University of Hong Kong
  • Microelectronics for Competitiveness
    Fudan University, Shanghai, People’s Republic of China
  • Self-Adjusted Analog Circuits
    Invited Lecture, International Microelectronics Conference, Sozopol, Bulgaria
  • Programmable Transceivers for Mobile Communications
    University of California, Irvine (CA), USA

Ph.D. Committees – Portugal

Served as advisor, co-advisor, external examiner, or committee member in the following doctoral examinations:

Multirate Switched-Capacitor Circuits and Their Applications in High-Frequency Signal Processing
Examiner (as academic supervisor), IST, 1992

Integrated Analog-to-Digital Conversion System with Functional Reconfiguration and Digital Testability
Examiner (as academic supervisor), IST, 1994

CMOS Digital Technology Integrated Circuits for High-Speed Digital-to-Analog Conversion
Examiner (as academic supervisor), IST, 1995

On-Line Algorithms for Future HEP Data Acquisition Systems
Examiner, IST, 1995

Computer-Aided Analysis and Synthesis of Switched-Capacitor Circuits Using Symbolic Methods
Examiner (as academic supervisor), FCT–Universidade Nova de Lisboa, 1995

Automatic Synthesis of Signal Conversion Systems from Algorithm-Level Descriptions
Examiner (as academic supervisor), IST, 1997

Multirate Switched-Capacitor Circuits for Two-Dimensional Signal Processing
Examiner (as academic supervisor), IST, 1997

Hardware/Software Co-Design Methodology for Reconfigurable Computing Architectures Using Implicit Parallelism-Based Partitioning
Examiner, IST, 1998

Testing of Analog and Mixed-Signal Circuits Using Power Supply Current and Output Voltage Correlation
Reviewer and Examiner, FEUP, 1998

Design Techniques for Low-Power, High-Dynamic Range Continuous-Time Filters
Reviewer and Examiner, IST, 1999

Techniques to Enhance Performance in Signal Digitization Systems
Reviewer and Examiner, IST, 1999

Academic and Professional Contact

This form is intended for contacting Professor José Franca regarding academic matters, research collaboration, supervision, or related professional enquiries.